ESD Diode Protection Incorporated on Leadframe Package
Frederick Ray I. Gomez, Edwin M. Graycochea Jr., Nerie R. Gomez, Rennier S. Rodriguez
Journal of Engineering Research and Reports · pp. 30–33 · Published 16 Jul 2020
10.9734/jerr/2020/v14i317126Abstract
With the new die technology becomes smaller and thinner, silicon die circuit metallization also becomes smaller, thus electronic devices like quad-flat no-leads multi-row (QFN-mr) semiconductor leadframe package design become more sensitive and prone to electrostatic discharge (ESD) damages. This paper focused and introduced an additional surface mount technology by attaching diodes before and after diebonding process to protect the whole package and to prevent package related issues encountered. With this diode attached on the silicon die and leads, added protection could be achieved on the integrated circuit (IC) mounted on the circuit board level.
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